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Getting Started with RISC-V Berlin
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Getting Started with RISC-V Berlin
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#1
Registration & Coffee
#2
SweRV Core & CHIPS Alliance Initiatives - Ted Marena, Western Digital
#3
Introduction to RISC-V - Calista Redmond, RISC-V Foundation
#4
Rocinante: Motor Control SoC with Integrated RISC-V Core - Dr. Onno Martens, Trinamic Motion Control
#5
Embedded Software Development for RISC-V Based SoC - Eyck Jentzsch, Minres Technology GmbH
#6
SCRx Family of the RISC-V Compatible Processor IP by Syntacore- Alexander Redkin & Pavel Khabarov, Syntacore
#7
Morning Break
#8
RISC-V SoC FPGA Brings Real-Time to Linux - Christian Rudel, Microchip Technology
#9
Machine Learning on Battery Operated Devices at the Very Edge Using a Multi-core RISC-V Based Processor - Martin Croome, GreenWaves
#10
Fast Start into RISC-V for AIoT with A+ Core - Florian Wohlrab, Andes Technology
#11
Lunch
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Thursday, Sep 19